Wichit Sirichote, kswichit@kmitl.ac.th
New 89C52 Microprocessor learning board with external 32kB eeprom. Modified PAULMON2 8051 monitor program provides eeprom boot loader. More 24-Bit I/O pins. Turn a learning board into a dedicated controller with a simple jumper setting. Designed for recycling student projects.
A microprocessor learning board having built-in monitor program is the the best way to study the architecture of a given microprocessor. While running a monitor program, we can practice enter a machine code in hexadecimal number and let the cpu executes it. We can examine memory, cpu registers and I/O pin. This led me to design a learning board for 89C52 cpu, the C52EVB. The C52EVB has been designed for study Assembly and C language programming at the Department of Applied Physics, KMITL since 1999. One day I brought an I2C serial eeprom, 24LC256, 32kB! The chip maker said we can get erase/write cycle minimum at 1,000,000 cycles! and the retention time is about 40Yrs! So I got the idea to use the eeprom for program saving and booting when powerup. The EXTRA memory space of PAULMON2 monitor program enables me to put the eeprom ZAP functions. I designed the new version of C52EVB to provide such eeprom ZAP functions. Under program development, student will have 32KB for program testing. After the program works fine, they can save the binary image into eeprom with maximum 32KB! I put the eeprom booting as a startup code in PAULMON2, so when power up the board, after serial port initialized, the booting function will check a jumper if it set, it will read the binary image from eeprom, write to SRAM and jump to start address running the program.
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Figure 1: Block diagram of C52EVB V2.0
The new C52EVB V2.0 features;
With the external eeprom boot loader enabled by jumper, student can use it for study programming in the LAB and can easily be used as a dedicated controller for final year senior project as well. Just to make the peripheral board and put it on cpu board.
- CPU: 89C52, CMOS 8-bit microcomputer @11.0592MHz,
- MEMORY: 62256, 32KB SRAM for both code and data space,
- EEPROM: 24LC256, 32KB serial eeprom,
- I/O pins: P1,P3 of 89C52, 24-bit I/O pins using 8255 PPI,
- Debug LED: single dot LED connected to P1.7,
- RS232 Level Converter: MAX232,
- Serial Interface: 9600 8n1,
- Monitor Program: 8KB PAULMON2 including external eeprom boot loader,
- I/O Connectors: four 16-pin connectors with modular design to provide I/O adapter board to be stacked,
- Programming: hexadecimal machine code, ASM51 Cross assembler, 8051 Micro-C compiler with small memory model.
Circuit
Here is the complete schematic C52evbv2.pdf. (Note. the latest schematic is in the C52EVB Reference Manual).
The circuit for CPU, memory and decoder is the same as C52-EVB. I added 8255 chip to provide 24-bit I/O pins. The 8255 chip was put in the external data memory space by using A15 address line to enable it. The address of 8255 registers are mapped into external data memory as follows;
PORTA = 0x0000,
PORTB = 0x0001,
PORTC = 0x0002 and
Control Register = 0x0003.So to talk to these registers, we must use MOVX instruction, e.g. to write control register for all output mode, the control word is 0x80.
MOV A,#80H
MOV DPTR,#0003
MOVX @DPTR,AWith Micro-C we may use function poke(unsigned address, int value);
poke(0x0003,0x80); // or with pointer,
unsigned char *dptr; // declare pointer vairable, dptr, not the same as DPTR register in cpu
dptr = 0x0003; // set dptr to 0x0003
*dptr = 0x80; // write 0x80 to control registerFor RS232C level converter, I changed from DS275 to MAX232. The DB9 is male type. The signal ties to DB9 connector is for NULL MODEM cable. The cable has a cross signal between TxD and RxD.
A big change is the I2C serial eeprom interfacing. It uses two I/O pins, i.e. P3.4 for SDA, data line and P1.0 for SCL, shift clock. The 24LC256 is 32kB eeprom. The address space is range from 0x0000 to 0x7FFF.
Software
mypaulm3.hex is the intel hex file for 89C52 chip. It includes EEPROM ZAP functions. You may use Easy-Downloader V2.0 to program the this file into a 89C52 chip.
Here is the source code that I modified;
The 1st 4kB or the hex code of mypaulm2.asm is mostly the same as my first design. The 2nd 4kB, however is the place where I put extra command with the help of PAULMON2's Program Header technique. You may study the source code of myextra.asm to see how I put the service functions for eeprom. The current version of mypaulmon3.hex is left space for another purpose only less than 200 Bytes. So if need to put more command, some of monitor command may need to delete. Above files need AS31 Assembler to convert from assembly code to object file. It may get from original PUALMON2 website.
Using ZAP eeprom functions
Let me talk a bit about how to use the external eeprom booting. Without a jumper ties P3.5 to GND signal, i.e. monitor mode. When press help command with ? we get;
PAULMON2 Loc:8000 > Help Standard Commands
?- This help list
M- List programs
R- Run program
D- Download
U- Upload
N- New location
J- Jump to memory location
H- Hex dump external memory
I- Hex dump internal memory
E- Editing external ram
C- Clear memory
User Installed Commands
L- List
S- Single-Step
Z- ZAP EEPROMPAULMON2 Loc:8000 >
The ZAP EEPROM is user installed command.
Try Z command,
PAULMON2 Loc:8000 > ZAP EEPROM 24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>The eeprom functions have three commands;
1 SAVE save start addess, number of byte and binary image to eeprom
2 DUMP dump hex code on screen
3 LOAD load binary image to SRAM, and execute at start address in SRAMWe can use number 1, 2, or 3 to execute the command. To quit from ZAP eeprom, just press SPACE BAR, say.
Since the SAVE function needs two input values; start address and number of byte to be saved, so suppose the program was tested and worked fine, quit from ZAP eeprom with SPACE BAR pressed, then use DOWNLOAD command.
24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>
PAULMON2 Loc:8000 > DownloadBegin ascii transfer of Intel hex file, or ESC to abort
SEnding file C:HELLO.HEX
.............................
Download completedSummary:
29 lines received
856 bytes received
856 bytes written
No errors detectedPAULMON2 Loc:8000 >
We see that PUALMON2 tells the number of byte that received. We may then use this number for SAVE function. Now get back to Z command and press 1 followed with start address and number of byte.
Download completed Summary:
29 lines received
856 bytes received
856 bytes written
No errors detectedPAULMON2 Loc:8000 > ZAP EEPROM
24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>
Save Program start address> 8000
Number of bytes [0-32768] > 856
Done..
24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>You may wonder why the counting number was so big. I used 2's complement or negative number for counting. It is easy to use INC DPTR and check both DPH and DPL are zero for looping (detail of assembly code is in myextra.asm). When completed, it will show Done...
Let DUMP it, what's in eeprom now. The physical address of SRAM is 0x8000-0xFFFF. Whereas the physical address of eeprom is 0x0000-0x7FFF. So when we dump the content of eeprom we can start with address 0x0000. Take a look more detail in the address 0x0000-0x000F, or first 16 bytes. 00 80 is start address of binary image in SRAM or 0x8000. The byte order is from low order byte to high order byte. Similarly for A8 FC , is 2's complemment of 856 or 0xFCA8. I provided this 16 bytes for record information. The rest is available for other parameters, if needed.
From address 0x0010 is start of binary image that read from SRAM start address.The hex code of these three bytes, i.e. 02 80 11 is LJMP 0x8011 instruction.
24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>
eeprom address [0000-7FFF] > 00000000 00 80 A8 FC 4D 02 20 52 00 00 00 A6 93 01 00 00
0010 02 80 11 00 00 00 00 00 00 00 00 43 8C DC 05 08
0020 32 75 81 08 90 F0 01 E4 F0 43 89 01 D2 AF D2 A9
0030 D2 8C 12 80 28 02 19 54 74 00 90 F0 00 F0 E5 08
0040 12 82 79 7B 0A 12 82 70 12 82 C6 45 F0 70 03 02
0050 80 45 02 80 2E 74 00 F5 08 E5 90 64 80 F5 90 90
0060 F0 00 E0 04 90 F0 00 F0 14 74 41 75 F0 83 C0 E0
0070 C0 F0 90 F0 00 E0 75 F0 00 C0 E0 C0 F0 90 F0 00
0080 E0 75 F0 00 C0 E0 C0 F0 90 F0 00 E0 75 F0 00 C0
0090 E0 C0 F0 74 04 75 F0 00 12 80 94 7F F8 12 82 5A
00A0 02 80 2E 22 23 F4 25 81 F8 12 83 17 12 80 E0 12
00B0 83 17 02 80 AF 78 FB 12 82 4E 86 82 08 86 83 E0
00C0 60 2D 12 80 BE A3 80 F7 78 FB 12 82 4E E6 30 99
00D0 FD C2 99 F5 99 B4 0A 17 74 0D 80 F2 E4 30 98 0C
00E0 30 98 FD C2 98 E5 99 B4 0D 02 74 0A 75 F0 00 22
00F0 12 82 27 86 82 08 86 83 08 E4 FE FF E0 70 06 1224LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>Let try press LOAD command with key '3', see what happen;
24LC256 EEPROM functions 1 SAVE, 2 DUMP, 3 LOAD
>
Loading...
hello world 1 1 1
hello world 2 2 10
hello world 3 3 11
hello world 4 4 100
hello world 5 5 101
hello world 6 6 110
hello world 7 7 111
hello world 8 8 1000
hello world 9 9 1001
hello world 10 A 1010
hello world 11 B 1011
hello world 12 C 1100
hello world 13 D 1101The binary image will be loaded from eeprom and written to SRAM. When complete the cpu started to run.
Now try turn off power, and put a jumper ties P3.5 to GND. Turn board power on again, we get;
Loading...
hello world 1 1 1
hello world 2 2 10
hello world 3 3 11
hello world 4 4 100
hello world 5 5 101
hello world 6 6 110
hello world 7 7 111
hello world 8 8 1000
hello world 9 9 1001
hello world 10 A 1010
hello world 11 B 1011
hello world 12 C 1100
hello world 13 D 1101
hello world 14 E 1110As long as the jumper makes P3.5 to logic '0', when startup, after initialize serial port with 9600 8n1, the binary image will be loaded into SRAM and will be executed automatically.
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Here is a sample of jumper that enables boot loader when powerup.
To get back to monitor mode is then easily be made by take the jumper out, makes P3.5 to logic '1'.
Download
Schematic C52evbv2.pdf Assembly Source code mypaulm2.asm
myextra.asmIntel Hex files mypaulm2.hex
myextra.hexIntel Hex file (combines above two files) mypaulm3.hex
C52EVB V2.0 Reference ManualC52reference.pdf (1,076,546Bytes) PCB gerber files( see below new gerber file) C52gerber.zip (185KB) OrCAD 9.1 MAX file (see below new MAX file) C52V2-1.max (325KB) OrCAD 9.1 Schematic Capture file C52V2.DSN (112KB) OrCAD 9.1 Netlist file C52V2.MNL (44KB) C52EVB V2.0 BOM c52evbv2.bom Sample Picture of PCB
Errata
- 20 August 2002: pin designation silk-screen at J4. I placed a wrong position of the text label between P1.1 and P1.2 on PCB. There is no error in schematic and reference manual.
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Updated gerber and MAX files
- 23 September 2002: new gerber file that corrects above errata and provides bigger mounting hole. Click here to download C52EVB2-2gerber.zip (202KB), and C52EVB2-2.max (330KB).
Contribution to C52EVB
- C52evb1.zip Single side layout of C52EVB V2.0 made by Vu Nhu Khanh from Vietnam.
- PCB2.PCB Protel PCB file for C52EVB version1 made by Winston Amorim from Brazil.
23 Sep 2545