C188SBC V1.0

Wichit Sirichote, wichit.sirichote@gmail.com

Build this generic tool for 16-bit microprocessor learning board. The CPU is Intel 80C188EB Embedded Microprocessor. Rich of onboard peripherals.

I got the project that needs to evaluate the power quality when a number of Photovoltaic Power System are being tied to the grid. So I need a device for recording the distortion of AC voltage waveform. A method is to have FFT machine for computing Total Harmonic Distortion (THD). I have tried with 8-bit Microcontroller but not completed, so I moved to 16-bit with x86 hardware. I found the intel 80C188 is nice for the new design. The code can test with PC and then ported to the embedded board easily. While testing under PC, I can use printf for program debugging. However when running on C188, I wrote the LCD functions that print result on LCD. The C188 has simple monitor program that allows user to download HEX file, examine memory, run the application program with special boot loader.

Figure 1: The prototype of C188SBC V1.0









The C188SBC V1.0 features;

Hardware Schematic

Figure 2 shows the complete hardware schematic of the C188SBC V1.0. The CPU is 80C188EB25, 68-pin PLCC package. The chip has internal oscillator. We use a 16MHz XTAL connected to CLKIN and OSCOUT pins. TP1 provides CLKOUT signal for peripheral. Reset signal produced by MAX691. TP2 also provides active high reset signal. The CPU has 20-bit address lines. The lower 8-bit lines are AD0-AD7, multiplex bus between A0-A7 and D0-D7. U2, 74HC573 with ALE control, latches A0-A7. The board has two memory chips, i.e. 512kB SRAM and 512kB Flash. Both chips needs A0-A18 to address 512kB space. The SRAM was selected by LCS (lower memory chip select) and the Flash by UCS (upper chip select). In this design the PLD was not used to decode memory chip.

Figure 2: Complete hardware schematic, CPU, memory, PLD

Figure 3: 1MB Memory Map

When power up reset, the CS register will be FFFFH and the IP will be 0000H, the physical address that sends out to the memory will then be FFFF0H. The UCS actives low to select the Flash memory for first instruction to be fetched. Since the CPU has internal programmable chip select unit, so we do not need external memory decoder. The Flash memory can be 64kB(29C512), 128kB(29C010), 256kB(29C020) or 512kB(29C040). We can use such memory chips plugged into U16 socket without any modifications. Care must be taken only the location of the reset vector. For example, it we use 64kB Flash, 29C512, then the reset vector appeared in the chip will be FFF0H. When put it on the board, it will be seen by CPU at FFFF0H.

The LCS was programmed by monitor program to be activated from address 00000H-7FFFFH (first 512kB).

U6 is PLD used for I/O space decoder. The onboard I/O uses GCS6 which was programmed to be activated for I/O space from location 3000H to 3FFFH. A8-A10 provides 8-location. Figure 4 shows the I/O map. GPIO1 and GPIO2 shares the same location but GPIO1 is for input port and GPIO2 for output port. The onboard I/O devices use buffered data bus through U1, tristate transceiver. The IOEX signal was enabled when GCS3-GCS6 are active.

Figure 4: I/O Map with GCS6

U15, 75176 standard RS485 bus transceiver ties to the on chip UART channel1. The UART channel 0 is for terminal interface. Figure 5 shows the Flash and SRAM under LCD.



Figure 5: The Flash memory and RAM under LCD.









PLD Equation

This design, I don't use bus status, S0 S1 S2 to decode I/O space, since the number of input pins is not enough. Instead I used preprogrammed GCS6 to select I/O space. The equation for each output is shown below.
; C188 PLD Equation
; Memory and I/O decoder for C188 Single Board Computer
; Wichit Sirichote, kswichit@kmitl.ac.th
; Feb 29, 2004
; PLD: Lattice GAL16V8D
; * logical AND, + logical OR, / logical NOT


a8= 2 a9=3 a10=4 den= 5 wr=6 rd=7 gcs3=8 gcs4=9 gcs5=1 gcs6=11
gpio1=12 gpio2=13 10baseT=14 usb=15 lpt=16 lcd_e=17 rtc=18 ioexp=19


gpio1 = a8 + a9 + a10 + rd + gcs6

/gpio2 = a8 + a9 + a10 + wr + gcs6

/lcd_e = rd * wr + a8 + a9 + /a10 + gcs6

rtc = /a8 + a9 + a10 + gcs6

10baseT = a8 + /a9 + a10 + gcs6

usb = /a8 + a9 + /a10 + gcs6

/lpt = /a8 + /a9 + a10 + wr + gcs6

ioexp = den + gcs6


You may learn how the PLCD produced decoded signals from above equation. The last line may need modify if you want to use GCS3, GCS4 and GCS5 to enable U1 also.


Monitor Program

I developed a simple monitor program, x86Bug to help me testing the code on the board.

x86Bug(RAM) V1.1 Boot LOADER for 80C188/186 Single Board Computer

d dump memory d100< (using extra segment)
r user registers display/modify
e edit memory e120<
l load intel hex file
u upload binary image
f fill memory with word
j jump to address
w write 16-bit data to onchip peripherals
o output byte to output port
i input byte from input port
p print peripheral registers
v version
? help menu



Command L is for downloading Intel hex file. It accepts only 64kB. The extend segment address is not available now. If the received record is correct by checksum testing, it will show ok.

>load Intel hex file...

SEnding file D:LED86.HEX


Then we can jump from monitor to our program by command J. We need to enter only offset address.

>jump to address CS:IP=0000:0000>0000:100

Let's see the first sample assembly code that makes onboard LED blink. LED86.ASM LED86.HEX

         CPU "80186.TBL" ; CPU TABLE    HOF "INT8"		; the machine code output file is intel HEX file     INCL "ecpcb.inc" ; include predefined 80C186/80C188 registers          org 100h		; begin location at 100H
start: nop
 	 mov dx,p1con  ; make P1.7 to be i/o port     mov al,7fh     out dx,al
     mov cx,100     ; 100 times
     mov al,0
led: push cx
     mov dx,p1ltch          out dx,al   ; send low byte of accumulator to P1 LATCH     call delay  ; call simple delay routine
     mov dx,3300h ; I tested the LPT with logic probe also     out dx,al
     not al  ; complement accumulator
     pop cx  ; restore loop counter     loop led
     jmp start ; repeat forever
delay: mov cx,2
delay1: push cx     mov cx,40000     loop $     pop cx     loop delay1     ret

Above code can be translated into machine code by C32 assembler, e.g.

D:\C32>c32 led86.asm -h led86.hex -l led86.lst

We can develop code with c language. Here is the sample code that prints cosine value on LCD, TEST.C and TEST.HEX.
The source code was complied by Pacific c compiler. The compiler can download here Pacific c compiler. To set the ROM and RAM address, select option menu.
     Enter ROM and RAM addresses in hex:       ROM Address: 500 RAM Address: E000 RAM Size: 1000
 Reset Address: 400 Non-volatile RAM Address: 10000
The reset address at 400 enables bootloader function. We will see later how it works.
The memory model and cpu can be selected from Option: Select Processor
 Select processor and memory model: 
Processor type Memory model     ( ) 8086 or 8088 -(*) Small      (*) 80186, 80188 or 80286 - ( ) Large      ( ) V25 processor -
[ ] 80C188EB specific powerup - 8[ ] Hardware (8087) floating point - 7

Boot Loader

The 512kB SRAM has +3V Lithium battery backup, we can load the hex code, test run under monitor and later make it bootable. Above code, test.hex with reset address at 400H enables booting function. You may test it after finish download the code, you can press reset button. The program will run automatically, see below.

>load Intel hex file...

SEnding file C:TEST.HEX



Boot Loader Auto Run...

The monitor program will check location 400H, if it has EA, after initialize UART, chip select unit, set Stack Segment and Stack Pointer register, it will jump to run at 400H. You may test it by removing power of the board and back again. To disable it, just press onboard KEY4 and press RESET. The byte EA will be replaced by 00. You can enter monitor mode again.


Schematic and layout:

U15 RS485 Transceiver, replace P2.2 with P1.0.
U10 swap pin 15 and pin17.
U8B replace P2.7 with P1.1.
NMI and HOLD has different GND name from main supply in the schematic. The prototype pcb has fixed by soldering pin 39 of J1 connector to ground plane.
P2.6 and P2.7 must have 4.7k pull-up.


Schematic c188.pdf
x86Bug Monitor Program that fits in 29C512, 64kB Flash Boot.asm Boot.hex
sample Pacific c code that prints cosine value on LCD Test.c Test.hex
Equation and JEDEC file for GAL16V8D C188.eqn


4 January 2005

Recovered 17 December 2015